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11th IEEE International Conference on Electronics, Circuits and Systems.



Circuit Techniques for Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design with Structural Methodology

Vadim V. Ivanov

I. M. Filanovsky

December 12, 2004, 9:00-12:30

Summary and Short Outline:

OpAmp is the main analog building block for both the systems on discrete elements and systems on silicon. The parameters of OpAmp often define and limit the overall system performance. CMOS technology provides an opportunity to use more complex structural solutions and circuit techniques to improve OpAmp accuracy, power/speed ratio, add new functional advantages, like low voltage supply operation capability or rail to rail input without switching point, for negligible additional component cost. The circuit techniques that will be demonstrated during this course were proven in design of leading industrial OpAmps. These techniques are unified by a common structural design approach, based on the following principles:
- system analysis at the high level of abstraction using the graphic tolls like signal flow graphs, and generation of the set of equivalent graph modifications,
- equivalent graph transformations to the form when every important parameter in the system or amplifier is controlled by a dedicated feedback loop;
- stability of these loops is achieved without compensation capacitors, using one-stage (preferably current) amplifiers,
- system synthesis consists of implementation of the set of the gain structure modifications followed by simulations based on available library of cells, and selection of the best circuit solutions.
The particular topics covered in this half-day course include:
- amplifier speed and correct number of the gain stages;
- gain boosting in single and two-stage OpAmp structures and elimination of gain erosion due to the drain-body leakage in single-well process;
- design of rail-to-rail input stages:
       NMOS/PMOS stages with stabilized transconductance,
       PMOS stage with low-noise charge pump for the tail current source,
       Using the low-Vt transistors to eliminate the switching point;
- CMR and PSR improvement:
       design of high quality tail current source,
       cascoding of the input pair,
       class AB output stage design;
- slew rate boost techniques;
- overload recovery time improvement;
- design techniques for 0.9 V power supply;
- using advantages of modern processes implementing different types of transistors.

 

Short Biographies:


Vadim V. Ivanov

Dr. Vadim Ivanov has his MSEE in 1980 and Ph.D.in 1987, both from the Institute of Electrical Engineering, St. Petersburg, Russia. He worked as the designer of electronic systems and ASICs for naval navigation equipment from 1980 to 1991 in St. Petersburg, and as the designer of mixed signal ASICs for sensors, GPS/GLONASS receivers and motor control systems between 1991 and 1995. Dr. Ivanov joined Burr Brown (presently Texas Instruments, Tucson) in 1996 as a senior member of technical staff, where he is involved with the design of operational, instrumentation, power amplifiers, references and switching and linear voltage regulators. Dr. Ivanov has 25 US patents, with 10 more pending, on analog circuit techniques. He is the author and coauthor of more than 30 technical papers and three books: "Integrated Power Amplifiers" (Leningrad, Rumb, 1987), "Analog System Design with ASICs" (Leningrad, Rumb, 1988), both in Russian, and "Operational Amplifier Speed and Accuracy Improvement", Kluwer, 2004.  

 


I. M. Filanovsky


I. M. Filanovsky (M'81-SM'90) was born in Kirov, USSR, in 1940. He received the M.Sc. degree in 1962 and the Ph.D. degree in 1968, both in electrical engineering from V. I. Ulianov (Lenin) Institute of Electrical Engineering, Leningrad, USSR.
In 1976, he joined the University of Alberta, Canada, where he is currently a Professor. He has coauthored with V.V. Ivanov the book Operational amplifier speed and accuracy improvement (Analog circuit design with structural methodology) (Kluwer Academic Publishers, 2004), and contributed to four books, Sensor Technology and Devices, L. Ristic, Ed., (Norwell, MA: Artech House, 1994), Analog VLSI: Signal and Information Processing, M. Ismail and T. Fiez, Eds, (New York: Mc-Graw-Hill, 1994), The Circuits and Filters Handbook, W.-K. Chen, Ed., (Boca Raton, FL: CRC Press, 1995), and The Electronics Handbook, J. Whitaker, Ed., (Boca Raton, FL: CRC Press, 1996). He was also a contributor to The Encyclopedia of Electrical and Electronic Engineering, J. Webster, Ed., (New York: Wiley, 1999) and Comprehensive Dictionary of Electrical Engineering, P. A. Laplante, Ed., (Boca Raton, FL: CRC Press, 1999). In addition, he is the author or coauthor of about 200 journal and conference proceedings publications on circuit theory (theory of approximation, theory and technical applications of oscillations, strongly nonlinear oscillations) and applied microelectronics (analog electronic circuits, oscillators and multivibrators, signal-conditioning circuits for sensors). He has four patents on electronic circuits.
Dr. I. M. Filanovsky is an Associated Editor of IEEE Transactions on Circuits and Systems, Part I. He is a Professional Engineer registered with APEGGA, Alberta, Canada. In the past he was Co-chairman and Technical Program Chairman of 33rd International Midwest Symposium on Circuits and Systems in Calgary, Canada, 1990.

 

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Mixed Analog/Digital Circuits in SOI CMOS

Andreas G. Andreou

December 12, 2004, 13:30-17:00

Summary and Short Outline:

Silicon on silicon (SOI) is emerging as a mainstream technology poised to become the standard for deep sub-micron VLSI. Devices with f(max) near 100GHz have been reported in 0.18 micron CMOS fabricated on ultra-thin silicon on insulator. Ultra-thin silicon on sapphire (SOS) is an alternative to silicon/silicon dioxide based technologies that employs epitaxially grown ultra-thin silicon and SIMOX isolation to form individual device islands. The absence of a conductive substrate and hence parasitic capacitances as well as excellent device characteristics at low frequencies makes this technology very attractive for high speed digital and radio frequency circuits and systems on a chip. The optical transparency of the sapphire together and its excellent thermal properties make ultra-thin silicon on sapphire an excellent candidate for system on a chip optoelectronics (SOCOE).
In this lecture we introduce the basic SOS technology and discuss the design of mixed analog/digital circuits in ultra-thin silicon on sapphire. We address traditional tradeoffs and present solutions to problems arising from the insulating substrate. Furthermore we expand on design perspectives and design methodologies that pertain to the ultra-thin SOS process that offers CMOS transistors with three different threshold voltages for each type of device. We make the discussion concrete by focusing on the design of high speed optoelectronic circuits, low power functional blocks that exploit the unique properties of this technology, amplifiers, data converters, active pixel sensor and event based imagers, sensor readout and biomedical telemetry. We will also discuss work towards surface micromachined MEMS structures in the same technology.

 

Short Biographies:


Andreas G. Andreou

Andreas G. Andreou received his Ph.D. in electrical engineering and computer science in 1986 from Johns Hopkins University. Between 1986 and 1989 he held post-doctoral fellow and associate research scientist positions in the electrical and computer engineering department while also a member of the professional staff at the Johns Hopkins Applied Physics Laboratory.
Andreou became an assistant professor of electrical and computer engineering in 1989, associate professor in 1993 and professor in 1996. In 1995 and 1997 he was a visiting associate professor and visiting professor respectively in the computation and neural systems program at the California Institute of Technology. In the summer of 2001 he was a visiting professor at Tohoku University in Japan working on 3D integration. He is also a faculty in the Whitaker Biomedical Engineering Institute at Johns Hopkins University and founding director of the Whitaker Institute fabrication and lithography facility. He is a recipient of a National Science Foundation Research Initiation Award and he is the co-founder of the Center for Language and Speech Processing at Johns Hopkins University. He is the recipient of the 2000 IEEE Circuits and Systems Society Darlington Award. Between 2000 and 2003 he served as a Member of the Board of Governors for the CAS Society.
Andreou's research interests include integrated circuits, sensory information processing and neural computation. He is a co-editor of the Kluwer Academic Publishers book: Adaptive Resonance Theory Microchips, 1998. He is associate editor of the IEEE Transactions on Circuits and Systems: Express Letters.  

 

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Ben Gurion University of the Negev