BGU_LOGO

Ben-Gurion University of the Negev
Faculty of Engineering Sciences
Department of Electrical and Computer Engineering


FINAL PROJECT

Advanced Computer Laboratory (36114693)


 

Main Page


Downloads:

IP's for DE2


Datasheets application notes and white paper

Quartus II

Cyclone II Device Family Technical Information


Tutorials

VHDL

Verilog HDL

 

Forums:

ALTERA Forum

 

Manufactor's site:

Altera

 

HighLearn

 

  1. Students can choose a final project from the projects list or to apply their own idea. The project is implemented by couple of students. The students have to send their selected project or own idea for final project to this e-mail: serge@ee.bgu.ac.il or talk with the lab-teacher, and wait for an approval for their project. Only then they can start working on it.
  1. There are steps in project implementation:
    1. Meeting with lab-teacher and getting approval;
    2. The project proposual creating;
    3. Project implementation;
    4. Final report creating;
    5. Project presentation.
  2. Tutorials about Verilog HDL and VHDL can be download form the menu on the left.
  3. Quartus II Development Software User Manual, User Guides and other relevant literature can be found in the menu on the left. The Quartus II tutorial can be found in the software itself.

Good Luck!

This page was built by Nati Shaked, 2003