University of the Negev
Faculty of Engineering Sciences
Department of Electrical and Computer Engineering
Field Programmable Gate
Array (FPGA) Lab
Advanced Computer Laboratory (36114693)
Datasheets application notes and white paper
FPGA experiment presented advanced topics in FPGA field, the HDL
languages concept and to Altera's Quartus II
- The students have to use two
development environments - Quartus II and ModelSim with one of these languages: Verilog HDL,
Altera design objects. The SignalTab and
Timing simulations tools will be observed deeply.
recent experiment specification is updated at:
about Verilog HDL and VHDL can be download form the menu in the left.
about Quartus and ModelSim
can be found in the software itself.
- Students who choose to specialize in Android can choose
to do a final Android project. In order to do this, the students have
to send their own idea for this project to this e-mail: email@example.com, and
wait for an approval for their project. Only then they can start
working on it.
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